Improving Multiple-block Prediction in the Block-based Trace Cache

Multiple-block prediction is emerging as a new and exciting research area. Highly accurate multiple-block predictors are essential for wide instruction fetch mechanisms, that will support future generations of microprocessors. The block-based trace cache is a recent proposal for wide instruction fetch. It aligns and stores instructions at the basic block level instead of at the trace level, thus significantly reducing instruction trace storage requirements. This paper investigates a new mechanism, the tree-based multiple-block predictor, that utilizes multiple-branch prediction techniques to improve trace construction in the fill unit. This new fill-time predictor, does not replace but augments the fetch time path-based next-trace predictor, by improving the trace construction heuristic. The tree-based multiple-block predictor utilizes a tree structure that represents all possible paths beginning at a root block, where each tree node is a branch predictor. Both a bimodal scheme and twolevel adaptive schemes are examined for these tree-node branch predictors. Results: The enhanced trace constructor using the tree-based multiple-block predictor improves performance of the SPECint95 benchmarks by 20% over [1]. It is observed that a two-level adaptive predictor outperforms bimodal by 6%. Finally, the block-based trace cache with the enhanced trace constructor improves performance 8% beyond that of perfect branch prediction and outperforms the conventional trace cache, with a perfect predictor, for instruction storage capacities up to 100KB.